2010-2011 Catalog 
    
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2010-2011 Catalog [ARCHIVED CATALOG]

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ECE 4362 - Synthesis with Verilog HDL

3 Credits (Minimum) 3 Credits (Maximum)
Logic synthesis with the Verilog hardware description language and commercial EDA tools. Includes an introduction to System Verilog. Project is required. Prer., ECE 4242/5242. Meets with ECE 5362.


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